An excelent project chip, the decade counter has ten outputs which go HIGH in sequence when a source of pulses is connected to the CLOCK input and when suitable logic levels are applied to the RESET and ENABLE inputs.
The 4017 takes a clock pulse in and then steps the output from negative to positive in a series of ten steps, with only one pin being on at a time. It has the unique capability of counting up to a certain number and then restarting the count, counting up to a certain number and halting, or it can be cascaded to more 4017's for a higher count.
The outputs are labeled 0 through 9. It can sink about 10 ma. of current per pin and is a very versitile IC. It operates from 3 VDC. to 15 VDC.
Two terminals on the 4017 chip, "Reset" and "Clock Enable," are maintained in a "low" state by means of a connection to the negative side of the battery (ground). This is necessary if the chip is to count freely. If the "Reset" terminal is made "high," the 4017's output will be reset back to 0 (pin #3 "high," all other output pins "low"). If the "Clock Enable" is made "high," the chip will stop responding to the clock signal and pause in its counting sequence.
If the 4017's "Reset" terminal is connected to one of its ten output terminals, its counting sequence will be cut short, or truncated.
Counters such as the 4017 may be used as digital frequency dividers, to take a clock signal and produce a pulse occurring at some integer factor of the clock frequency. For example, if the clock signal from the 555 timer is 200 Hz, and the 4017 is configured for a full-count sequence (the "Reset" terminal connected to ground, giving a full, ten-step count), a signal with a period ten times as long (20 Hz) will be present at any of the 4017's output terminals. In other words, each output terminal will cycle once for every ten cycles of the clock signal: a frequency ten times as slow.